Timing Optimization Through Clock Skew Scheduling

Timing Optimization Through Clock Skew Scheduling by Ivan S. Kourtev, Eby G. Friedman, Baris Taskin.

History of the Book The last three decades have witnessed an explosive development in integrated circuit fabrication technologies. The complexities of cur­ rent CMOS circuits are reaching beyond the 100 nanometer feature size and multi-hundred million transistors per integrated circuit. To fully exp...

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Bibliographic Details
Main Authors: Kourtev, Ivan S. (Author), Friedman, Eby G. (Author), Taskin, Baris (Author)
Corporate Author: SpringerLink (Online service)
Format: eBook
Language:English
Published: New York, NY : Springer US : Imprint: Springer, 2000.
Edition:1st ed. 2000.
Series:Springer eBook Collection.
Subjects:
Electronic circuits.
Electrical engineering.
Computer-aided engineering.
Electronic resources (E-books)
Online Access:Click to view e-book
Holy Cross Note:Loaded electronically.
Electronic access restricted to members of the Holy Cross Community.
Table of Contents:
  • 1. Introduction
  • 2. VLSI Systems
  • 2.1 Signal Representation
  • 2.2 Synchronous VLSI Systems
  • 2.3 The VLSI Design Process
  • 2.4 Summary
  • 3. Signal Delay In Vlsi Systems
  • 3.1 Delay Metrics
  • 3.2 Devices and Interconnections
  • 4. Timing Properties Of Synchronous Systems
  • 4.1 Storage Elements
  • 4.2 Latches
  • 4.3 Parameters of Latches
  • 4.4 Flip-Flops
  • 4.5 Parameters of Flip-Flops
  • 4.6 The Clock Signal
  • 4.7 Single-Phase Path with Flip-Flops
  • 4.8 Single-Phase Path with Latches
  • 4.9 A Final Note
  • 5. Clock Scheduling and Clock Tree Synthesis
  • 5.1 Background
  • 5.2 Definitions and Graphical Model
  • 5.3 Clock Scheduling
  • 5.4 Structure of the Clock Distribution Network
  • 5.5 Solution of the Clock Tree Synthesis Problem
  • 5.6 Software Implementation
  • 6. Clock Scheduling For Improved Reliability
  • 6.1 Problem Formulation
  • 6.2 Derivation of the QP Algorithm
  • 7. Practical Considerations
  • 7.1 Computational Analysis
  • 7.2 Unconstrained Basis Skews
  • 7.3 I/O Registers and Target Delays
  • 8. Experimental Results
  • 8.1 Description of Computer Implementation
  • 8.2 Graphical Illustrations of Results
  • 9. Conclusions
  • 10. Future Directions
  • 10.1 Algorithmic Enhancements
  • 10.2 Practical Considerations
  • References
  • Appendices
  • A- Numerical Illustration of Algorithms
  • A.1 Algorithm LMCS-1
  • A.2 Algorithm LMCS-2
  • A.3 Algorithm CSD
  • B- Glossary of Terms
  • C- Graphical Illustration of Results
  • About the Authors.

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