Networks on Chip

Networks on Chip edited by Axel Jantsch, Hannu Tenhunen.

As the number of processor cores and IP blocks integrated on a single chip is steadily growing, a systematic approach to design the communication infrastructure becomes necessary. Different variants of packed switched on-chip networks have been proposed by several groups during the past two years. T...

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Bibliographic Details
Corporate Author: SpringerLink (Online service)
Other Authors: Jantsch, Axel (Editor), Tenhunen, Hannu (Editor)
Format: eBook
Language:English
Published: New York, NY : Springer US : Imprint: Springer, 2003.
Edition:1st ed. 2003.
Series:Springer eBook Collection.
Subjects:
Architecture, Computer.
Microprocessors.
Computer-aided engineering.
Operating systems (Computers).
Special purpose computers.
Electronic resources (E-books)
Online Access:Click to view e-book
Holy Cross Note:Loaded electronically.
Electronic access restricted to members of the Holy Cross Community.
Table of Contents:
  • System Design and Methodology
  • Will Networks on Chip Close the Productivity Gap?
  • A Design Methodology for NOC-Based Systems
  • Mapping Concurrent Applications onto Architectural Platforms
  • Guaranteeing the Quality of Services in Networks on Chip
  • Hardware and Basic Infrastructure
  • On Packet Switched Networks for On-Chip Communication
  • Energy-Reliability trade-Off for NoCs
  • Testing Strategies for Networks on Chip
  • Clocking Strategies for Networks-on-Chip
  • A Parallel Computer as a NOC Region
  • An IP-Based On-Chip Packet-Switched Network
  • Software and Application Interfaces
  • Beyond the Von Neumann Machine
  • NoC Application Programming Interfaces
  • Multi-Level Software Validation for NoC
  • Software for Multiprocessor Networks on Chip.

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