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|a 9783642186097
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|a 10.1007/978-3-642-18609-7
|2 doi
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|a (DE-He213)978-3-642-18609-7
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|a Sekanina, Lukas.
|e author.
|0 (orcid)0000-0002-2693-9011
|1 https://orcid.org/0000-0002-2693-9011
|4 aut
|4 http://id.loc.gov/vocabulary/relators/aut
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|a Evolvable Components
|h [electronic resource] :
|b From Theory to Hardware Implementations /
|c by Lukas Sekanina.
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|a 1st ed. 2004.
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|a Berlin, Heidelberg :
|b Springer Berlin Heidelberg :
|b Imprint: Springer,
|c 2004.
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|a XVI, 195 p.
|b online resource.
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|a text
|b txt
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|a computer
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|a online resource
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|a Natural Computing Series,
|x 1619-7127
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|a Springer eBook Collection
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|a 1 Introduction -- 1.1 Natural Computing -- 1.2 Bioinspired Hardware -- 1.3 Motivation for Research -- 2 Reconfigurable Hardware -- 2.1 Digital Cicuits -- 2.2 Digital Circuit Design -- 2.3 Field Programmable Gate arrays -- 2.4 Hardware Reused as Software -- 2.5 Reconfigurable Computing -- 2.6 Nanotechnology -- 2.7 Cell Matrix -- 2.8 Summary -- 3 Evolutionary Algorithms -- 3.1 Introduction -- 3.2 Variant of Evolutionary Algorithms -- 3.3 Some Other Features of Evolutionary Algorithms -- 3.4 Evolutionary Design and Optimization -- 3.5 The Evolutionary Algorithm Design -- 3.6 Formal Approach -- 3.7 Summary -- 4 Evolvable Hardware -- 4.1 Basic Concept -- 4.2 Cartesian Genetic Programming -- 4.3 Features of Cartesian Genetic Programming -- 4.4 From Chromosome to Fitness Value -- 4.5 Fitness Function -- 4.6 Applications and Degree of Hardware Implementation -- 4.7 Promising Results -- 4.8 Major Current Problems and Potential Solutions -- 4.9 Summary -- 5 Towards Evolvable Components -- 5.1 Component Approach to Problem Solving -- 5.2 Evolvable Components -- 5.3 Hardware Implementation -- 5.4 Extension of Evolvable Components -- 5.5 Summary -- 6 Evolvable Computational Machines -- 6.1 Computational Machines and Evolutionary Design -- 6.2 Cellular Automata -- 6.3 General Evolvable Computational Machine -- 6.4 Dynamic Environment -- 6.5 Evolvable Computational System -- 6.6 Properties of Evolvable Machines -- 6.7 The Computational Power -- 6.8 Summary -- 7 An Evolvable Component for Image Pre-processing -- 7.1 Motivation and Problem Specification -- 7.2 The Image Filter Design -- 7.3 Analysis of Reconfigurability and Size of the Search Space -- 7.4 Evolutionary Design: Experimental Framework -- 7.5 Filters for Smoothing -- 7.6 Other Image Operators -- 7.7 Dynamics Environment -- 7.8 A Note on a Single Filter Design -- 7.9 Summary -- Virtual Reconfigurable Devices -- 8.1 Chip on Top of a Chip -- 8.2 Architecture of Virtual Reconfigurable Circuits -- 8.3 Implementation Costs -- 8.4 Speeding up the Evolutionary Design -- 8.5 Genetic Unit -- 8.6 Physical Realization -- 8.7 Discussion -- 8.8 Summary -- 9 Concluding Statements -- 9.1 The Approach -- 9.2 The Obtained Results -- 9.3 Future Work -- References.
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|a At the beginning of the 1990s research started in how to combine soft comput ing with reconfigurable hardware in a quite unique way. One of the methods that was developed has been called evolvable hardware. Thanks to evolution ary algorithms researchers have started to evolve electronic circuits routinely. A number of interesting circuits - with features unreachable by means of con ventional techniques - have been developed. Evolvable hardware is quite pop ular right now; more than fifty research groups are spread out over the world. Evolvable hardware has become a part of the curriculum at some universi ties. Evolvable hardware is being commercialized and there are specialized conferences devoted to evolvable hardware. On the other hand, surprisingly, we can feel the lack of a theoretical background and consistent design methodology in the area. Furthermore, it is quite difficult to implement really innovative and practically successful evolvable systems using contemporary digital reconfigurable technology.
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|a Loaded electronically.
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|a Electronic access restricted to members of the Holy Cross Community.
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|a Architecture, Computer.
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|a Special purpose computers.
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|a Arithmetic and logic units, Computer.
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|a Computers.
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|a Optical data processing.
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