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|a Formal Methods in Computer-Aided Design
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|b 5th International Conference, FMCAD 2004, Austin, Texas, USA, November 15-17, 2004, Proceedings /
|c edited by Alan J. Hu, Andrew K. Martin.
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|a 1st ed. 2004.
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|a Berlin, Heidelberg :
|b Springer Berlin Heidelberg :
|b Imprint: Springer,
|c 2004.
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|a Lecture Notes in Computer Science,
|x 0302-9743 ;
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|a Springer eBook Collection
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|a Challenges in System-Level Design -- Generating Fast Multipliers Using Clever Circuits -- Verification of Analog and Mixed-Signal Circuits Using Hybrid System Techniques -- A Methodology for the Formal Verification of FFT Algorithms in HOL -- A Functional Approach to the Formal Specification of Networks on Chip -- Proof Styles in Operational Semantics -- Integrating Reasoning About Ordinal Arithmetic into ACL2 -- Combining Equivalence Verification and Completion Functions -- Synchronization-at-Retirement for Pipeline Verification -- Late Design Changes (ECOs) for Sequentially Optimized Esterel Designs -- Non-miter-based Combinational Equivalence Checking by Comparing BDDs with Different Variable Orders -- Scalable Automated Verification via Expert-System Guided Transformations -- Simple Yet Efficient Improvements of SAT Based Bounded Model Checking -- Simple Bounded LTL Model Checking -- QuBE++: An Efficient QBF Solver -- Bounded Probabilistic Model Checking with the Mur? Verifier -- Increasing the Robustness of Bounded Model Checking by Computing Lower Bounds on the Reachable States -- Bounded Verification of Past LTL -- A Hybrid of Counterexample-Based and Proof-Based Abstraction -- Memory Efficient All-Solutions SAT Solver and Its Application for Reachability Analysis -- Approximate Symbolic Model Checking for Incomplete Designs -- Extending Extended Vacuity -- Parameterized Vacuity -- An Operational Semantics for Weak PSL -- Accepting Predecessors Are Better than Back Edges in Distributed LTL Model-Checking -- Bloom Filters in Probabilistic Verification -- A Simple Method for Parameterized Verification of Cache Coherence Protocols -- A Partitioning Methodology for BDD-Based Verification -- Invariant Checking Combining Forward and Backward Traversal -- Variable Reuse for Efficient Image Computation.
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|a Electronic access restricted to members of the Holy Cross Community.
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|a Computer-aided engineering.
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|a Computer hardware.
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|a Software engineering.
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|a Computer logic.
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| 650 |
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|a Mathematical logic.
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| 650 |
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|a Artificial intelligence.
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| 690 |
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|a Electronic resources (E-books)
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| 700 |
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|a Hu, Alan J.
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| 700 |
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|a Martin, Andrew K.
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