Code Generation for Embedded Processors

Code Generation for Embedded Processors edited by Peter Marwedel, Gert Goossens.

Modern electronics is driven by the explosive growth of digital communications and multi-media technology. A basic challenge is to design first-time-right complex digital systems, that meet stringent constraints on performance and power dissipation. In order to combine this growing system complexity...

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Bibliographic Details
Corporate Author: SpringerLink (Online service)
Other Authors: Marwedel, Peter (Editor), Goossens, Gert (Editor)
Format: eBook
Language:English
Published: New York, NY : Springer US : Imprint: Springer, 2002.
Edition:1st ed. 2002.
Series:The Springer International Series in Engineering and Computer Science, 317
Springer eBook Collection.
Subjects:
Computers.
Engineering.
Electronic circuits.
Computer-aided engineering.
Electrical engineering.
Special purpose computers.
Electronic resources (E-books)
Online Access:Click to view e-book
Holy Cross Note:Loaded electronically.
Electronic access restricted to members of the Holy Cross Community.
Table of Contents:
  • I Requirements
  • 1 Code Generation for Embedded Processors : An Introduction
  • 2 Retargetable Code Generation : Key Issues for Successful Introduction
  • 3 Challenges in Code Generation for Embedded Processors
  • II Retargetable Code Generation Systems
  • 4 Flexware : A Flexible Firmware Development Environment for Embedded Systems
  • 5 Chess : Retargetable Code Generation for Embedded DSP Processors
  • 6 An ILP-Based Approach to Code Generation
  • 7 Retargetable Code Generation for Parallel, Pipelined Processor Structures
  • III Machine Description Models and Formal Methods
  • 8 Beyond Tool-Specific Machine Descriptions
  • 9 On Transforming Code Generation to a Parsing Problem
  • 10 Local Microcode Generation in System Design
  • 11 Code Generation Based on Trellis Diagrams
  • 12 A Unified Code Generation Approach Using Mutation Scheduling
  • IV Special Applications and Future Directions
  • 13 Retargetable Compilation of Self-Test Programs Using Constraint Logic Programming
  • 14 Code Generation for Transport Triggered Architectures
  • 15 Software Synthesis for Real-Time Information Processing Systems
  • References.

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