The gm/ID Methodology, a sizing tool for low-voltage analog CMOS Circuits The semi-empirical and compact model approaches

The gm/ID Methodology, a sizing tool for low-voltage analog CMOS Circuits The semi-empirical and compact model approaches / by Paul Jespers.

How to determine transistor sizes and currents when the supply voltages of analog CMOS circuits do not exceed 1.2V and transistors operate in weak, moderate or strong inversion? The gm/ID methodology offers a solution provided a reference transconductance over drain current ratio is available. The r...

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Bibliographic Details
Main Author: Jespers, Paul (Author)
Corporate Author: SpringerLink (Online service)
Format: eBook
Language:English
Published: New York, NY : Springer US : Imprint: Springer, 2010.
Edition:1st ed. 2010.
Series:Analog Circuits and Signal Processing,
Springer eBook Collection.
Subjects:
Electronic circuits.
Electronics.
Microelectronics.
Microprocessors.
Solid state physics.
Spectroscopy.
Microscopy.
Electronic resources (E-books)
Online Access:Click to view e-book
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Call Number: E-Book
Status: Available

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