Timing Performance of Nanometer Digital Circuits Under Process Variations by Victor Champac, Jose Garcia Gervacio.

This book discusses the digital design of integrated circuits under process variations, with a focus on design-time solutions. The authors describe a step-by-step methodology, going from logic gates to logic paths to the circuit level. Topics are presented in comprehensively, without overwhelming us...

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Bibliographic Details
Main Authors: Champac, Victor (Author), Garcia Gervacio, Jose (Author)
Corporate Author: SpringerLink (Online service)
Format: eBook
Language:English
Published: Cham : Springer International Publishing : Imprint: Springer, 2018.
Edition:1st ed. 2018.
Series:Frontiers in Electronic Testing, 39
Springer eBook Collection.
Subjects:
Online Access:Click to view e-book
Holy Cross Note:Loaded electronically.
Electronic access restricted to members of the Holy Cross Community.
Description
Summary:This book discusses the digital design of integrated circuits under process variations, with a focus on design-time solutions. The authors describe a step-by-step methodology, going from logic gates to logic paths to the circuit level. Topics are presented in comprehensively, without overwhelming use of analytical formulations. Emphasis is placed on providing digital designers with understanding of the sources of process variations, their impact on circuit performance and tools for improving their designs to comply with product specifications. Various circuit-level “design hints” are highlighted, so that readers can use then to improve their designs. A special treatment is devoted to unique design issues and the impact of process variations on the performance of FinFET based circuits. This book enables readers to make optimal decisions at design time, toward more efficient circuits, with better yield and higher reliability.
Physical Description:XVIII, 185 p. 116 illus., 91 illus. in color. online resource.
ISBN:9783319754659
ISSN:0929-1296 ;
DOI:10.1007/978-3-319-75465-9