Hardware Security and Trust Design and Deployment of Integrated Circuits in a Threatened Environment / edited by Nicolas Sklavos, Ricardo Chaves, Giorgio Di Natale, Francesco Regazzoni.

This book provides a comprehensive introduction to hardware security, from specification to implementation. Applications discussed include embedded systems ranging from small RFID tags to satellites orbiting the earth. The authors describe a design and synthesis flow, which will transform a given ci...

Full description

Saved in:
Bibliographic Details
Corporate Author: SpringerLink (Online service)
Other Authors: Sklavos, Nicolas (Editor), Chaves, Ricardo (Editor), Di Natale, Giorgio (Editor), Regazzoni, Francesco (Editor)
Format: eBook
Language:English
Published: Cham : Springer International Publishing : Imprint: Springer, 2017.
Edition:1st ed. 2017.
Series:Springer eBook Collection.
Subjects:
Online Access:Click to view e-book
Holy Cross Note:Loaded electronically.
Electronic access restricted to members of the Holy Cross Community.
Description
Summary:This book provides a comprehensive introduction to hardware security, from specification to implementation. Applications discussed include embedded systems ranging from small RFID tags to satellites orbiting the earth. The authors describe a design and synthesis flow, which will transform a given circuit into a secure design incorporating counter-measures against fault attacks. In order to address the conflict between testability and security, the authors describe innovative design-for-testability (DFT) computer-aided design (CAD) tools that support security challenges, engineered for compliance with existing, commercial tools. Secure protocols are discussed, which protect access to necessary test infrastructures and enable the design of secure access controllers. Covers all aspects of hardware security including design, manufacturing, testing, reliability, validation and utilization; Describes new methods and algorithms for the identification/detection of hardware trojans; Defines new architectures capable of detecting faults and resisting fault attacks; Establishes a design and synthesis flow to transform a given circuit into a secure design, incorporating counter-measures against fault attacks.
Physical Description:X, 254 p. 99 illus., 47 illus. in color. online resource.
ISBN:9783319443188
DOI:10.1007/978-3-319-44318-8