Low Power Methodology Manual For System-on-Chip Design

Low Power Methodology Manual For System-on-Chip Design / by David Flynn, Rob Aitken, Alan Gibbons, Kaijian Shi.

"Tools alone aren't enough to reduce dynamic and leakage power in complex chip designs - a well-planned methodology is needed. Following in the footsteps of the successful Reuse Methodology Manual (RMM), authors from ARM and Synopsys have written this Low Power Methodology Manual (LPMM) to...

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Bibliographic Details
Main Authors: Flynn, David (Author), Aitken, Rob (Author), Gibbons, Alan (Author), Shi, Kaijian (Author)
Corporate Author: SpringerLink (Online service)
Format: eBook
Language:English
Published: New York, NY : Springer US : Imprint: Springer, 2007.
Edition:1st ed. 2007.
Series:Integrated Circuits and Systems,
Springer eBook Collection.
Subjects:
Electronic circuits.
Electronics.
Microelectronics.
Electrical engineering.
Computer hardware.
Electronic resources (E-books)
Online Access:Click to view e-book
Holy Cross Note:Loaded electronically.
Electronic access restricted to members of the Holy Cross Community.
Table of Contents:
  • Standard Low Power Methods
  • Multi-Voltage Design
  • Power Gating Overview
  • Designing Power Gating
  • Architectural Issues for Power Gating
  • A Power Gating Example
  • IP Design for Low Power
  • Frequency and Voltage Scaling Design
  • Examples of Voltage and Frequency Scaling Design
  • Implementing Multi-Voltage, Power Gated Designs
  • Physical Libraries
  • Retention Register Design
  • Design of the Power Switching Network.

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