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|a 10.1007/978-1-4614-0445-3
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|a Cao, Yu.
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|a Predictive Technology Model for Robust Nanoelectronic Design
|h [electronic resource] /
|c by Yu Cao.
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| 250 |
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|a 1st ed. 2011.
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| 264 |
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1 |
|a New York, NY :
|b Springer US :
|b Imprint: Springer,
|c 2011.
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| 300 |
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|a XV, 173 p.
|b online resource.
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|a Integrated Circuits and Systems,
|x 1558-9412
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|a Springer eBook Collection
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|a 1. Introduction -- 2. Predictive Technology Model of Conventional CMOS Devices -- 3. Predictive Technology Model of Enhanced CMOS Devices -- 4. Statistical Extraction and Modeling of CMOS Variability -- 5. Modeling of Temporal Reliability Degradation -- 6. Modeling of Interconnect Parasitics -- 7. Design Benchmark with Predictive Technology Model -- 8. Predictive Process Design Kits -- 9. Predictive Modeling of Carbon Nanotube Devices -- 10. Predictive Technology Model for Future Nanoelectronic Design.
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| 520 |
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|a Predictive Technology Model for Robust Nanoelectronic Design explains many of the technical mysteries behind the Predictive Technology Model (PTM) that has been adopted worldwide in explorative design research. Through physical derivation and technology extrapolation, PTM is the de-factor device model used in electronic design. This work explains the systematic model development and provides a guide to robust design practice in the presence of variability and reliability issues. Having interacted with multiple leading semiconductor companies and university research teams, the author brings a state-of-the-art perspective on technology scaling to this work and shares insights gained in the practices of device modeling.
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|a Loaded electronically.
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|a Electronic access restricted to members of the Holy Cross Community.
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|a Electronic circuits.
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|a Electronics.
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| 650 |
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|a Microelectronics.
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| 650 |
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|a Nanotechnology.
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| 650 |
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|a Computer software—Reusability.
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