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|a 9783540755968
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|a 10.1007/978-3-540-75596-8
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|a Automated Technology for Verification and Analysis
|h [electronic resource] :
|b 5th International Symposium, ATVA 2007 Tokyo, Japan, October 22-25, 2007 Proceedings /
|c edited by Kedar Namjoshi, Tomohiro Yoneda, Teruo Higashino, Yoshio Okamura.
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| 250 |
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|a 1st ed. 2007.
|
| 264 |
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1 |
|a Berlin, Heidelberg :
|b Springer Berlin Heidelberg :
|b Imprint: Springer,
|c 2007.
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| 300 |
|
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|a XIV, 570 p.
|b online resource.
|
| 336 |
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|a text
|b txt
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| 490 |
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|a Programming and Software Engineering ;
|v 4762
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| 490 |
1 |
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|a Springer eBook Collection
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| 505 |
0 |
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|a Invited Talks -- Policies and Proofs for Code Auditing -- Recent Trend in Industry and Expectation to DA Research -- Toward Property-Driven Abstraction for Heap Manipulating Programs -- Branching vs. Linear Time: Semantical Perspective -- Regular Papers -- Mind the Shapes: Abstraction Refinement Via Topology Invariants -- Complete SAT-Based Model Checking for Context-Free Processes -- Bounded Model Checking of Analog and Mixed-Signal Circuits Using an SMT Solver -- Model Checking Contracts – A Case Study -- On the Efficient Computation of the Minimal Coverability Set for Petri Nets -- Analog/Mixed-Signal Circuit Verification Using Models Generated from Simulation Traces -- Automatic Merge-Point Detection for Sequential Equivalence Checking of System-Level and RTL Descriptions -- Proving Termination of Tree Manipulating Programs -- Symbolic Fault Tree Analysis for Reactive Systems -- Computing Game Values for Crash Games -- Timed Control with Observation Based and Stuttering Invariant Strategies -- Deciding Simulations on Probabilistic Automata -- Mechanizing the Powerset Construction for Restricted Classes of ?-Automata -- Verifying Heap-Manipulating Programs in an SMT Framework -- A Generic Constructive Solution for Concurrent Games with Expressive Constraints on Strategies -- Distributed Synthesis for Alternating-Time Logics -- Timeout and Calendar Based Finite State Modeling and Verification of Real-Time Systems -- Efficient Approximate Verification of Promela Models Via Symmetry Markers -- Latticed Simulation Relations and Games -- Providing Evidence of Likely Being on Time: Counterexample Generation for CTMC Model Checking -- Assertion-Based Proof Checking of Chang-Roberts Leader Election in PVS -- Continuous Petri Nets: Expressive Power and Decidability Issues -- Quantifying the Discord: Order Discrepancies in Message Sequence Charts -- A Formal Methodology to Test Complex Heterogeneous Systems -- A New Approach to Bounded Model Checking for Branching Time Logics -- Exact State Set Representations in the Verification of Linear Hybrid Systems with Large Discrete State Space -- A Compositional Semantics for Dynamic Fault Trees in Terms of Interactive Markov Chains -- 3-Valued Circuit SAT for STE with Automatic Refinement -- Bounded Synthesis -- Short Papers -- Formal Modeling and Verification of High-Availability Protocol for Network Security Appliances -- A Brief Introduction to -- On-the-Fly Model Checking of Fair Non-repudiation Protocols -- Model Checking Bounded Prioritized Time Petri Nets -- Using Patterns and Composite Propositions to Automate the Generation of LTL Specifications -- Pruning State Spaces with Extended Beam Search -- Using Counterexample Analysis to Minimize the Number of Predicates for Predicate Abstraction.
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| 590 |
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|a Loaded electronically.
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| 590 |
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|a Electronic access restricted to members of the Holy Cross Community.
|
| 650 |
|
0 |
|a Computer-aided engineering.
|
| 650 |
|
0 |
|a Computer logic.
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| 650 |
|
0 |
|a Computers.
|
| 650 |
|
0 |
|a Computer communication systems.
|
| 650 |
|
0 |
|a Special purpose computers.
|
| 650 |
|
0 |
|a Software engineering.
|
| 690 |
|
|
|a Electronic resources (E-books)
|
| 700 |
1 |
|
|a Namjoshi, Kedar.
|e editor.
|4 edt
|4 http://id.loc.gov/vocabulary/relators/edt
|
| 700 |
1 |
|
|a Yoneda, Tomohiro.
|e editor.
|4 edt
|4 http://id.loc.gov/vocabulary/relators/edt
|
| 700 |
1 |
|
|a Higashino, Teruo.
|e editor.
|4 edt
|4 http://id.loc.gov/vocabulary/relators/edt
|
| 700 |
1 |
|
|a Okamura, Yoshio.
|e editor.
|4 edt
|4 http://id.loc.gov/vocabulary/relators/edt
|
| 710 |
2 |
|
|a SpringerLink (Online service)
|
| 773 |
0 |
|
|t Springer eBooks
|
| 830 |
|
0 |
|a Programming and Software Engineering ;
|v 4762
|
| 830 |
|
0 |
|a Springer eBook Collection.
|
| 856 |
4 |
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