Functional Verification of Programmable Embedded Architectures A Top-Down Approach / by Prabhat Mishra, Nikil D. Dutt.

Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current System-on-Chip design methodology. A critical challenge in validation of such systems is the lack of a golden reference model. As a result, many ex...

Full description

Saved in:
Bibliographic Details
Main Authors: Mishra, Prabhat (Author), Dutt, Nikil D. (Author)
Corporate Author: SpringerLink (Online service)
Format: eBook
Language:English
Published: New York, NY : Springer US : Imprint: Springer, 2005.
Edition:1st ed. 2005.
Series:Springer eBook Collection.
Subjects:
Online Access:Click to view e-book
Holy Cross Note:Loaded electronically.
Electronic access restricted to members of the Holy Cross Community.

MARC

LEADER 00000nam a22000005i 4500
001 b3326288
003 MWH
005 20191028162518.0
007 cr nn 008mamaa
008 100301s2005 xxu| s |||| 0|eng d
020 |a 9780387263991 
024 7 |a 10.1007/b137514  |2 doi 
035 |a (DE-He213)978-0-387-26399-1 
050 4 |a E-Book 
072 7 |a TJFC  |2 bicssc 
072 7 |a TEC008010  |2 bisacsh 
072 7 |a TJFC  |2 thema 
100 1 |a Mishra, Prabhat.  |e author.  |4 aut  |4 http://id.loc.gov/vocabulary/relators/aut 
245 1 0 |a Functional Verification of Programmable Embedded Architectures  |h [electronic resource] :  |b A Top-Down Approach /  |c by Prabhat Mishra, Nikil D. Dutt. 
250 |a 1st ed. 2005. 
264 1 |a New York, NY :  |b Springer US :  |b Imprint: Springer,  |c 2005. 
300 |a XIX, 180 p.  |b online resource. 
336 |a text  |b txt  |2 rdacontent 
337 |a computer  |b c  |2 rdamedia 
338 |a online resource  |b cr  |2 rdacarrier 
347 |a text file  |b PDF  |2 rda 
490 1 |a Springer eBook Collection 
505 0 |a to Functional Verification -- Architecture Specification -- Architecture Specification -- Validation of Specification -- Top-Down Validation -- Executable Model Generation -- Design Validation -- Functional Test Generation -- Future Directions -- Conclusions. 
520 |a Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current System-on-Chip design methodology. A critical challenge in validation of such systems is the lack of a golden reference model. As a result, many existing validation techniques employ a bottom-up approach to design verification, where the functionality of an existing architecture is, in essence, reverse-engineered from its implementation. Traditional validation techniques employ different reference models depending on the abstraction level and verification task, resulting in potential inconsistencies between multiple reference models. This book presents a top-down validation methodology that complements the existing bottom-up approaches. It leverages the system architect’s knowledge about the behavior of the design through architecture specification using an Architecture Description Language (ADL). The authors also address two fundamental challenges in functional verification: lack of a golden reference model, and lack of a comprehensive functional coverage metric. Functional Verification of Programmable Embedded Architectures: A Top-Down Approach is designed for students, researchers, CAD tool developers, designers, and managers interested in the development of tools, techniques and methodologies for system-level design, microprocessor validation, design space exploration and functional verification of embedded systems. 
590 |a Loaded electronically. 
590 |a Electronic access restricted to members of the Holy Cross Community. 
650 0 |a Electronic circuits. 
650 0 |a Microprocessors. 
650 0 |a Special purpose computers. 
650 0 |a Computer-aided engineering. 
650 0 |a Computer system failures. 
650 0 |a Electrical engineering. 
690 |a Electronic resources (E-books) 
700 1 |a Dutt, Nikil D.  |e author.  |4 aut  |4 http://id.loc.gov/vocabulary/relators/aut 
710 2 |a SpringerLink (Online service) 
773 0 |t Springer eBooks 
830 0 |a Springer eBook Collection. 
856 4 0 |u https://holycross.idm.oclc.org/login?auth=cas&url=https://doi.org/10.1007/b137514  |3 Click to view e-book 
907 |a .b33262883  |b 04-18-22  |c 02-26-20 
998 |a he  |b 02-26-20  |c m  |d @   |e -  |f eng  |g xxu  |h 0  |i 1 
912 |a ZDB-2-ENG 
950 |a Engineering (Springer-11647) 
902 |a springer purchased ebooks 
903 |a SEB-COLL 
945 |f  - -   |g 1  |h 0  |j  - -   |k  - -   |l he   |o -  |p $0.00  |q -  |r -  |s b   |t 38  |u 0  |v 0  |w 0  |x 0  |y .i22394503  |z 02-26-20 
999 f f |i ec67a3dd-fd01-5ca5-9146-27b985ef0fe3  |s fa093fe7-4118-5676-bda6-8e1cf7e0f2a4 
952 f f |p Online  |a College of the Holy Cross  |b Main Campus  |c E-Resources  |d Online  |e E-Book  |h Library of Congress classification  |i Elec File  |n 1