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| 037 |
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|a 10.1002/9780470987629
|b Wiley InterScience
|n http://www3.interscience.wiley.com
|
| 050 |
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4 |
|a TK7885.7
|b .M54 2008eb
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| 072 |
|
7 |
|a COM
|x 018000
|2 bisacsh
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| 049 |
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|a HCDD
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| 100 |
1 |
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|a Minns, Peter D.
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| 245 |
1 |
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|a FSM-based digital design using Verilog HDL /
|c Peter Minns, Ian Elliott.
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| 246 |
3 |
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|a Finite state machine based digital design using Verilog HDL
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| 260 |
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|a Chichester, England ;
|a Hoboken, NJ :
|b J. Wiley & Sons,
|c ©2008.
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| 300 |
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|a 1 online resource (xiii, 391 pages) :
|b illustrations
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| 336 |
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|a text
|b txt
|2 rdacontent
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| 337 |
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|a computer
|b c
|2 rdamedia
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| 338 |
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|a online resource
|b cr
|2 rdacarrier
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| 347 |
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|a data file
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|a Includes bibliographical references and index.
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0 |
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|a Print version record.
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|a FSM-based Digital Design using Verilog HDL; Contents; Preface; Acknowledgements; 1 Introduction to Finite-State Machines and State Diagrams for the Design of Electronic Circuits and Systems; 2 Using State Diagrams to Control External Hardware Subsystems; 3 Synthesizing Hardware from a State Diagram; 4 Synchronous Finite-State Machine Designs; 5 The One Hot Technique in Finite-State Machine Design; 6 Introduction to Verilog HDL; 7 Elements of Verilog HDL; 8 Describing Combinational and Sequential Logic using Verilog HDL; 9 Asynchronous Finite-State Machines; 10 Introduction to Petri Nets.
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| 505 |
8 |
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|a Appendix A: Logic Gates and Boolean Algebra Used in the BookAppendix B: Counting and Shifting Circuit Techniques; Appendix C: Tutorial on the Use of Verilog HDL to Simulate a Finite-State Machine Design; Appendix D: Implementing State Machines using Verilog Behavioural Mode; Index.
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| 520 |
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|a As digital circuit elements decrease in physical size, resulting in increasingly complex systems, a basic logic model that can be used in the control and design of a range of semiconductor devices is vital. Finite State Machines (FSM) have numerous advantages; they can be applied to many areas (including motor control, and signal and serial data identification to name a few) and they use less logic than their alternatives, leading to the development of faster digital hardware systems. This clear and logical book presents a range of novel techniques for the rapid and reliable design of digita.
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| 546 |
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|a English.
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| 650 |
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0 |
|a Verilog (Computer hardware description language)
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| 650 |
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0 |
|a Digital electronics.
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| 650 |
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0 |
|a Sequential machine theory.
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| 650 |
|
7 |
|a COMPUTERS
|x Data Processing.
|2 bisacsh
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| 650 |
|
7 |
|a Digital electronics
|2 fast
|
| 650 |
|
7 |
|a Sequential machine theory
|2 fast
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| 650 |
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7 |
|a Verilog (Computer hardware description language)
|2 fast
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| 650 |
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7 |
|a Digitalelektronik
|2 gnd
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| 650 |
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7 |
|a Digitales System
|2 gnd
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| 650 |
|
7 |
|a VERILOG
|2 gnd
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| 700 |
1 |
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|a Elliott, Ian D.
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| 758 |
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|i has work:
|a FSM-based digital design using Verilog HDL (Text)
|1 https://id.oclc.org/worldcat/entity/E39PCGgWVyVJvWMFgBTFybY8wd
|4 https://id.oclc.org/worldcat/ontology/hasWork
|
| 776 |
0 |
8 |
|i Print version:
|a Minns, Peter D.
|t FSM-based digital design using Verilog HDL.
|d Chichester, England ; Hoboken, NJ : J. Wiley & Sons, ©2008
|w (DLC) 2007043838
|
| 856 |
4 |
0 |
|u https://ebookcentral.proquest.com/lib/holycrosscollege-ebooks/detail.action?docID=470251
|y Click for online access
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|a EBC-AC
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| 994 |
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|a 92
|b HCD
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