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|b MIT Press
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|b D55 1989eb
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|a HCDD
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1 |
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|a Dill, David L.
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1 |
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|a Trace theory for automatic hierarchical verification of speed-independent circuits /
|c David L. Dill.
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| 260 |
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|a Cambridge, Mass. :
|b MIT Press,
|c ©1989.
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| 300 |
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|a 1 online resource (163 pages) :
|b illustrations
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| 336 |
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|a text
|b txt
|2 rdacontent
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|a computer
|b c
|2 rdamedia
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|a online resource
|b cr
|2 rdacarrier
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| 490 |
1 |
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|a ACM distinguished dissertations
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|a Includes bibliographical references (pages 153-159) and index.
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| 505 |
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|a 1. Introduction -- 2. Circuit structure -- 3. Prefix-closed trace structures -- 4. Verification -- 5. An automatic verifier -- 6. Infinite sequences and infinite games -- 7. Complete trace structures -- 8. Conclusion.
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| 520 |
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|a "Speed-independent circuits offer a potential solution to the timing problems of VLSI. In this book David Dill develops and implements a theory for practical automatic verification of these control circuits. He describes a formal model of circuit operation, defines the proper relationship between an implementation and its specification, and constructs a computer program that can check this relationship. Asynchronous or speed-independent circuit design has gained renewed interest in the VLSI community because of the possibilities it provides for dealing with problems that arise with the increasing complexity of VLSI circuits. Speed-independent circuits offer a way around such phenomena as clock skew, which can be a serious obstacle in the design of large systems. They can expedite circuit design by reducing design time and simplifying the overall process. A major challenge to the successful utilization of speed-independent circuits is correctness. The verification method described here insures that a design is correct and because it can be automated it is a significant advantage over manual verification. Dill proposes two distinct theories - prefix-closed trace structures, which can model and specify safety properties, and complete trace structures, which can also deal with liveness and fairness properties."
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|a Print version record.
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|3 Use copy
|f Restrictions unspecified
|2 star
|5 MiAaHDL
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| 533 |
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|a Electronic reproduction.
|b [Place of publication not identified] :
|c HathiTrust Digital Library,
|d 2011.
|5 MiAaHDL
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| 538 |
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|a Master and use copy. Digital master created according to Benchmark for Faithful Digital Reproductions of Monographs and Serials, Version 1. Digital Library Federation, December 2002.
|u http://purl.oclc.org/DLF/benchrepro0212
|5 MiAaHDL
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| 583 |
1 |
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|a digitized
|c 2011
|h HathiTrust Digital Library
|l committed to preserve
|2 pda
|5 MiAaHDL
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| 650 |
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|a Switching circuits.
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| 650 |
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|a Integrated circuits
|x Very large scale integration.
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| 650 |
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|a Sequential machine theory.
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| 650 |
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|a Integrated circuits
|x Verification.
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7 |
|a Integrated circuits
|x Verification
|2 fast
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| 650 |
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|a Integrated circuits
|x Very large scale integration
|2 fast
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| 650 |
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7 |
|a Sequential machine theory
|2 fast
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| 650 |
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|a Switching circuits
|2 fast
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| 650 |
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|a Asynchrones Schaltwerk
|2 gnd
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| 650 |
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|a Computerarchitektur
|2 gnd
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|a Hardwareverifikation
|2 gnd
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|a Integrierte Schaltung
|2 gnd
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| 655 |
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|a Geschwindigkeitsunabhängigkeit.
|2 swd
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| 776 |
0 |
8 |
|i Print version:
|a Dill, David L.
|t Trace theory for automatic hierarchical verification of speed-independent circuits.
|d Cambridge, Mass. : MIT Press, ©1989
|z 0262041014
|w (DLC) 89012546
|w (OCoLC)20014870
|
| 830 |
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0 |
|a ACM distinguished dissertations.
|
| 856 |
4 |
0 |
|u https://holycross.idm.oclc.org/login?auth=cas&url=https://doi.org/10.7551/mitpress/6874.001.0001?locatt=mode:legacy
|y Click for online access
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| 903 |
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|a MIT-D2O-Backfile-Complete
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| 994 |
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|a 92
|b HCD
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