Quick-Turnaround ASIC Design in VHDL Core-Based Behavioral Synthesis

Quick-Turnaround ASIC Design in VHDL Core-Based Behavioral Synthesis / by N. Bouden-Romdhane, Vijay Madisetti, J.W. Hines.

From the Foreword..... Modern digital signal processing applications provide a large challenge to the system designer. Algorithms are becoming increasingly complex, and yet they must be realized with tight performance constraints. Nevertheless, these DSP algorithms are often built from many constitu...

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Bibliographic Details
Main Authors: Bouden-Romdhane, N. (Author), Madisetti, Vijay (Author), Hines, J.W (Author)
Corporate Author: SpringerLink (Online service)
Format: eBook
Language:English
Published: New York, NY : Springer US : Imprint: Springer, 1996.
Edition:1st ed. 1996.
Series:The Springer International Series in Engineering and Computer Science, 367
Springer eBook Collection.
Subjects:
Electronic circuits.
Electrical engineering.
Computer-aided engineering.
Signal processing.
Image processing.
Speech processing systems.
Electronic resources (E-books)
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Call Number: E-Book
Status: Available

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