VHDL Modeling for Digital Design Synthesis

VHDL Modeling for Digital Design Synthesis by Yu-Chin Hsu, Kevin F. Tsai, Jessie T. Liu, Eric S. Lin.

The purpose of this book is to introduce VHSIC Hardware Description Lan­ guage (VHDL) and its use for synthesis. VHDL is a hardware description language which provides a means of specifying a digital system over different levels of abstraction. It supports behavior specification during the early sta...

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Bibliographic Details
Main Authors: Yu-Chin Hsu (Author), Tsai, Kevin F. (Author), Liu, Jessie T. (Author), Lin, Eric S. (Author)
Corporate Author: SpringerLink (Online service)
Format: eBook
Language:English
Published: New York, NY : Springer US : Imprint: Springer, 1995.
Edition:1st ed. 1995.
Series:Springer eBook Collection.
Subjects:
Computers.
Engineering.
Electronic circuits.
Computer-aided engineering.
Electrical engineering.
Electronic resources (E-books)
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Call Number: E-Book
Status: Available

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