Low-Power Deep Sub-Micron CMOS Logic Sub-threshold Current Reduction / by P. van der Meer, A. van Staveren, Arthur H.M. van Roermund.
1. 1 Power-dissipation trends in CMOS circuits Shrinking device geometry, growing chip area and increased data-processing speed performance are technological trends in the integrated circuit industry to enlarge chip functionality. Already in 1965 Gordon Moore predicted that the total number of devic...
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