Test Resource Partitioning for System-on-a-Chip

Test Resource Partitioning for System-on-a-Chip by Vikram Iyengar, Anshuman Chandra.

Test Resource Partitioning for System-on-a-Chip is about test resource partitioning and optimization techniques for plug-and-play system-on-a-chip (SOC) test automation. Plug-and-play refers to the paradigm in which core-to-core interfaces as well as core-to-SOC logic interfaces are standardized, su...

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Bibliographic Details
Main Authors: Iyengar, Vikram (Author), Chandra, Anshuman (Author)
Corporate Author: SpringerLink (Online service)
Format: eBook
Language:English
Published: New York, NY : Springer US : Imprint: Springer, 2002.
Edition:1st ed. 2002.
Series:Frontiers in Electronic Testing, 20
Springer eBook Collection.
Subjects:
Electronic circuits.
Electrical engineering.
Computer-aided engineering.
Electronic resources (E-books)
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