Leakage in Nanometer CMOS Technologies edited by Siva G. Narendra, Anantha P. Chandrakasan.

Scaling transistors into the nanometer regime has resulted in a dramatic increase in MOS leakage (i.e., off-state) current. Threshold voltages of transistors have scaled to maintain performance at reduced power supply voltages. Leakage current has become a major portion of the total power consumptio...

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Bibliographic Details
Corporate Author: SpringerLink (Online service)
Other Authors: Narendra, Siva G. (Editor), Chandrakasan, Anantha P. (Editor)
Format: eBook
Language:English
Published: New York, NY : Springer US : Imprint: Springer, 2006.
Edition:1st ed. 2006.
Series:Integrated Circuits and Systems,
Springer eBook Collection.
Subjects:
Online Access:Click to view e-book
Holy Cross Note:Loaded electronically.
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